171-5702 |
4-Mbit (2 × 2) with JEDEC pinout
2 × 8-bit ROM. Bottom serves D0-D7 and top D8-D15.
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171-5703 |
4-Mbit with JEDEC compliant pinout
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171-5841 |
5-Mbit (1 + 4) with JEDEC (compliant) pinout
CE switching by A17 using a 74139 2- to 4-line decoder.
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171-5919 |
4-Mbit with JEDEC compliant pinout and 8,192 × 8-bit Static RAM
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171-5921 |
8-Mbit (2 × 4) with JEDEC compliant pinout and 8,192 × 8-bit Static RAM
CE switching by A19 using a 74139 2- to 4-line decoder.
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171-5927 |
1-Mbit with JEDEC pinout
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171-5944 |
5-Mbit (1 + 4) with JEDEC (compliant) pinout and 8,192 × 8-bit Static RAM
CE switching by A17 using a 74139 2- to 4-line decoder.
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171-5955 |
8-Mbit with JEDEC pinout and 8,192 × 8-bit Static RAM
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171-5978 |
8-Mbit with JEDEC pinout
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171-5979 |
8-Mbit (2 × 4) with JEDEC compliant pinout
CE switching by A19 using a 74139 2- to 4-line decoder.
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171-6021 |
8-Mbit with JEDEC pinout and 32,768 × 8-bit Static RAM
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171-6111 |
8-Mbit with JEDEC pinout and 128 × 8-bit Serial EEPROM
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171-6206 |
4-Mbit with JEDEC compliant pinout (based on 171-5703)
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171-6278 |
16-Mbit with JEDEC pinout and 8,192 × 8-bit Static RAM
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171-6279 |
16-Mbit with JEDEC pinout and 32,768 × 8-bit Static RAM (based on 171-6021)
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171-6304 |
4-Mbit with JEDEC compliant pinout and 128 × 8-bit Serial EEPROM (based on 171-6111)
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171-6329 |
16-Mbit with JEDEC pinout
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171-6330 |
16-Mbit (2 × 8) with JEDEC pinout
CE switching by A20 using 7400 NAND gates.
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171-6570 |
32-Mbit (2 × 16) with JEDEC pinout
CE switching by A21 using 7400 NAND gates.
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171-6572 |
32-Mbit (2 × 16) with JEDEC pinout and 32,768 × 8-bit Static RAM
CE switching by A21 using a 74139 2- to 4-line decoder. Switching between SRAM and IC2 using TIME (0xA130Fx area) and D0.
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171-6584 |
16-Mbit with JEDEC pinout and 128 × 8-bit Serial EEPROM (based on 171-6111)
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171-6587 |
16-Mbit (2 × 8) chip-on-board
CE switching by A20 using some built-in logic of the left COB.
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171-6658 |
16-Mbit with JEDEC pinout and 512 × 8-bit Ferroelectric RAM
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171-7147 |
32-Mbit with 27C322 pinout |